Generally, a cold cathode tube is used as a light source of backlight for a liquid crystal panel. To apply a high alternating voltage to the cold cathode tube to light it up, a piezoelectric transducer for example having a pair of primary electrodes and a secondary electrode is used. The brightness of the cold cathode tube can be adjusted by applying a high voltage intermittently at a frequency (for example 200 Hz) lower than the frequency (for example 60 KHz) of the high alternating voltage and controlling the ratio between a period of performing the voltage-applying operation and a period of stopping the voltage-applying operation in the intermittent operation. This technique is called burst dimming, and a circuit implementing this technique is built into a piezoelectric transducer drive circuit driving a piezoelectric transducer (see for example Japanese Patent Laying-Open No. 9-107684 (Patent Document 1)).
FIG. 3 shows such a piezoelectric transducer drive circuit and a cold cathode tube lighting device having the same. A cold cathode tube lighting device 51 includes: a so-called push-pull type piezoelectric transducer drive circuit 55; a piezoelectric transducer 56 driven by piezoelectric transducer drive circuit 55 to boost an alternating voltage applied to a pair of primary electrodes 56a and 56b and output a high voltage from a secondary electrode 56c; a cold cathode tube 57 connected as a load to secondary electrode 56c of piezoelectric transducer 56; and an impedance device 58 connected in series with cold cathode tube 57.
When an alternating voltage is applied to the pair of primary electrodes 56a and 56b, piezoelectric transducer 56 boosts the voltage by piezoelectric effect and outputs a high voltage from secondary electrode 56c. Cold cathode tube 57 lights up when the high voltage output from piezoelectric transducer 56 is applied thereto. FIG. 4 illustrates a boosting ratio of piezoelectric transducer 56 to a frequency of the alternating voltage applied to primary electrodes 56a and 56b, in which a curve A represents the case where a tube current IFL does not flow through cold cathode tube 57 (when cold cathode tube 57 does not light up), and a curve B represents the case where tube current IFL flows through cold cathode tube 57 (when cold cathode tube 57 lights up). The boosting ratio of piezoelectric transducer 56 depends on the frequency, and when cold cathode tube 57 lights up, the boosting ratio has a peak at a resonance frequency f0. Actually, the boosting ratio is used at a frequency f1 which is near and slightly higher than resonance frequency f0. Tube current IFL is subjected to feedback control by impedance device 58 and piezoelectric transducer drive circuit 55 such that the alternating voltage applied to primary electrodes 56a and 56b is set to have frequency f1.
Piezoelectric transducer drive circuit 55 includes: a detection circuit (CDET) 61 detecting a signal of impedance device 58 as a signal indicating the state of the load connected to secondary electrode 56c and outputting a peak voltage or an average voltage thereof; an error amplification circuit 62 comparing the output voltage of detection circuit 61 supplied via a detection voltage input terminal EIN with an error reference voltage VREF1 and outputting a voltage according to a difference therebetween from an oscillation-controlling voltage output terminal EOUT; a voltage-controlled oscillator (VCO) 63 controlled by the output voltage of error amplification circuit 62 and outputting an oscillation clock CLK having a reference frequency (for example about 120 KHz) and a triangular wave signal T1 in synchronization with oscillation clock CLK; an applied voltage detection circuit (VDET) 65 detecting the alternating voltage applied to primary electrode 56a of piezoelectric transducer 56 supplied after being attenuated by an attenuator 64 including resistors connected in series, and outputting a peak voltage or an average voltage thereof; a second error amplification circuit 66 comparing the output voltage of applied voltage detection circuit 65 supplied to its inverting input terminal with a second error reference voltage VREF2 supplied to its non-inverting input terminal, and amplifying and outputting a differential voltage; a PWM comparator 67 comparing the output voltage of the second error amplification circuit 66 supplied to its non-inverting input terminal with triangular wave signal T1 of voltage-controlled oscillator 63 supplied to its inverting input terminal, and outputting a PWM signal; an AND circuit 68 having one input terminal supplied with the PWM signal of PWM comparator 67 and the other input terminal supplied with an intermittent signal BURST output from a burst comparator 80 which will be described later; a P-type MOS transistor 70 having a gate supplied with an output signal of AND circuit 68 via an inverting buffer 69, and a source connected to a driving power supply voltage VCC; a frequency divider (DIV) 71 dividing the frequency of oscillation clock CLK of voltage-controlled oscillator 63 for output; an N-type MOS transistor 73 having a gate supplied with the output of frequency divider 71 via a buffer 72, a source grounded, and a drain connected to primary electrode 56a of piezoelectric transducer 56; an N-type MOS transistor 75 having a gate supplied with the output of frequency divider 71 via an inverting buffer 74, a source grounded, and a drain connected to primary electrode 56b of piezoelectric transducer 56; an inductor 76 having one end connected to the drain of N-type MOS transistor 73 and the other end connected to the drain of P-type MOS transistor 70 described above; an inductor 77 having one end connected to the drain of N-type MOS transistor 75 and the other end connected to the drain of P-type MOS transistor 70; and a fly wheel diode 78 having a cathode connected to the drain of P-type MOS transistor 70 and an anode grounded.
Further, piezoelectric transducer drive circuit 55 includes: an oscillator (OSC) 79 having an input terminal BCNT supplied with a control voltage VBCNT for adjusting the brightness of cold cathode tube 57, and outputting a triangular wave signal T2 having a frequency at which a high voltage is intermittently applied (for example 200 Hz); and burst comparator 80 comparing triangular wave signal T2 of oscillator 79 supplied to its non-inverting input terminal with control voltage VBCNT supplied to its inverting input terminal and outputting intermittent signal BURST. Intermittent signal BURST output from burst comparator 80 is supplied to error amplification circuit 62 described above via an intermittent signal input terminal BIN.
The operation of piezoelectric transducer drive circuit 55 will now be described. Tube current IFL flowing through cold cathode tube 57 is detected by impedance device 58 and converted to a voltage signal. The voltage signal is then detected by detection circuit 61, and its peak voltage or average voltage is output. The output voltage of detection circuit 61 is compared with error reference voltage VREF1 in error amplification circuit 62, and a voltage according to the difference between the two voltages is output. Voltage-controlled oscillator 63 is controlled by the output voltage of error amplification circuit 62, and outputs oscillation clock CLK having the reference frequency according to the voltage as well as triangular wave signal T1. Triangular wave signal T1 output from voltage-controlled oscillator 63 is compared with the output voltage of the second error amplification circuit 66 in PWM comparator 67. The resulting PWM signal is output from PWM comparator 67, supplied via AND circuit 68 to inverting buffer 69 for inversion, and then supplied to the gate of P-type MOS transistor 70. On the other hand, oscillation clock CLK output from voltage-controlled oscillator 63, having its frequency divided by frequency divider 71, is supplied via buffer 72 and inverting buffer 74 to the gate of N-type MOS transistor 73 and the gate of N-type MOS transistor 75, to turn the two transistors ON and OFF alternately. When N-type MOS transistor 73 is turned ON and P-type MOS transistor 70 is turned ON, a current flows from driving power supply voltage VCC to inductor 76 to store energy. When N-type MOS transistor 73 is turned OFF in a next cycle, a voltage according to the stored energy is generated and applied to primary electrode 56a of piezoelectric transducer 56. Further, when N-type MOS transistor 73 is turned OFF and N-type MOS transistor 75 is turned ON, and P-type MOS transistor 70 is turned ON, a current flows from driving power supply voltage VCC to inductor 77 to store energy. When N-type MOS transistor 75 is turned OFF in a next cycle, a voltage according to the stored energy is generated and applied to primary electrode 56b of piezoelectric transducer 56.
Accordingly, in response to oscillation clock CLK output from voltage-controlled oscillator 63, the two N-type MOS transistors 73 and 75 are alternately turned ON and OFF, applying an alternating voltage to primary electrodes 56a and 56b of piezoelectric transducer 56. In addition, for example, if tube current IFL flowing through cold cathode tube 57 is higher than a predetermined value, the frequency of oscillation clock CLK from voltage-controlled oscillator 63 is increased, and the frequency of the alternating voltage applied to primary electrodes 56a and 56b of piezoelectric transducer 56 is also increased. In contrast, if tube current IFL flowing through cold cathode tube 57 is lower than the predetermined value, the frequency of the alternating voltage applied to primary electrodes 56a and 56b of piezoelectric transducer 56 is reduced. Thereby, tube current IFL flowing through cold cathode tube 57 is fed back to control the frequency of the alternating voltage applied to primary electrodes 56a and 56b of piezoelectric transducer 56.
Further, the alternating voltage applied to primary electrode 56a of piezoelectric transducer 56 is attenuated by attenuator 64, and detected by applied voltage detection circuit 65 to output its peak voltage or average voltage. Then, the output voltage of applied voltage detection circuit 65 is compared with the second error reference voltage VREF2 by the second error amplification circuit 66, and the difference between the two voltages is amplified and output. As described above, the output voltage is compared with triangular wave signal T1 of voltage-controlled oscillator 63 in PWM comparator 67. These circuits are provided to maintain the alternating voltage applied to primary electrodes 56a and 56b of piezoelectric transducer 56 constant to suppress the effect of variation in driving power supply voltage VCC.
Next, the control of the intermittent operation will be described. When triangular wave signal T2 output from oscillator (OSC) 79 has a voltage higher than control voltage VBCNT of input terminal BCNT, intermittent signal BURST output from burst comparator 80 is in a high level, and when triangular wave signal T2 has a voltage lower than control voltage VBCNT, intermittent signal BURST is in a low level. When intermittent signal BURST is in a high level, piezoelectric transducer drive circuit 55 is in the state of performing the voltage-applying operation (lighting operation), lighting up cold cathode tube 57. In contrast, when intermittent signal BURST is in a low level, P-type MOS transistor 70 is always turned OFF via AND circuit 68, and thus piezoelectric transducer drive circuit 55 is in the state of stopping the voltage-applying operation (stopping lighting), turning cold cathode tube 57 off. This intermittent operation is periodically performed at the frequency of triangular wave signal T2, that is, the frequency of intermittent signal BURST.
Next, referring to FIG. 5, details of error amplification circuit 62 shown in FIG. 3 will be described. In FIG. 5, the error amplification circuit is designated by a numeral 101. Error amplification circuit 101 has detection voltage input terminal EIN supplied with the output voltage of detection circuit (CDET) 61 for tube current IFL; intermittent signal input terminal BIN supplied with intermittent signal BURST output from burst comparator 80; and oscillation-controlling voltage output terminal EOUT outputting an oscillation-controlling voltage controlling voltage-controlled oscillator (VCO) 63. An inverting input terminal of a comparator 111 is connected to detection voltage input terminal EIN, and constant error reference voltage VREF1 is input to a non-inverting input terminal of comparator 111. Then, comparator 111 compares the output voltage of detection circuit 61 with error reference voltage VREF1 and outputs a signal in a high level or a low level according to the comparison result. A control terminal of a switch means 113 is connected to an output of comparator 111. A constant current source 112 on the side of ground is connected to one input terminal of switch means 113, and a constant current source 115 on the side of a power supply voltage VDD is connected to the other input terminal of switch means 113. When the control terminal is in a low level, switch means 113 allows an output terminal and one input terminal to electrically conduct with each other, and when the control terminal is in a high level, switch means 113 allows the output terminal and the other input terminal to electrically conduct with each other. One end of another switch means 116 is connected to the output terminal of switch means 113. Switch means 116 has a control terminal to which intermittent signal input terminal BIN is connected, and the other end to which oscillation-controlling voltage output terminal EOUT and one end of a capacitor 114 are connected, the other end of capacitor 114 being grounded. Switch means 116 becomes nonconductive when the control terminal is in a low level, and becomes conductive when the control terminal is in a high level.
Next, an operation of error amplification circuit 101 will be described. Intermittent signal input terminal BIN is supplied with a signal in a low level when the voltage-applying operation is stopped in the intermittent operation, and it is supplied with a signal in a high level when the voltage-applying operation is performed in the intermittent operation. Switch means 116 is conductive when the voltage-applying operation is performed in the intermittent operation. When detection voltage input terminal EIN has a voltage lower than error reference voltage VREF1, capacitor 114 is charged by constant current source 115, increasing the voltage of oscillation-controlling voltage output terminal EOUT. When the voltage of oscillation-controlling voltage output terminal EOUT is increased, an oscillation frequency of voltage-controlled oscillator 63 is reduced, increasing tube current IFL. In contrast, when detection voltage input terminal EIN has a voltage higher than error reference voltage VREF1, capacitor 114 is discharged by constant current source 112, decreasing the voltage of oscillation-controlling voltage output terminal EOUT. When the voltage of oscillation-controlling voltage output terminal EOUT is decreased, the oscillation frequency of voltage-controlled oscillator 63 is increased, reducing tube current IFL. Accordingly, when the voltage-applying operation is stably performed (when a sufficient period of time has passed since the voltage-applying operation is started), voltage-controlled oscillator 63 oscillates at a frequency according to the voltage of oscillation-controlling voltage output terminal EOUT such that the voltage of detection voltage input terminal EIN matches with error reference voltage VREF1. When the voltage-applying operation is stopped in the intermittent operation, switch means 116 becomes nonconductive, and capacitor 114 maintains the voltage obtained when the voltage-applying operation is stably performed, in order to oscillate voltage-controlled oscillator 63 when the voltage-applying operation in the intermittent operation is started again, at a frequency before the voltage-applying operation is stopped.
Patent Document 1: Japanese Patent Laying-Open No. 9-107684